> When doing some study on the current non-working Daytona 2BoE, an unusual PPC CPU
> behavior was logged in debug mode(CROM Self Test): it reads an un-mapped space from
> 0xc3000000 to 0xc37fffff, 8 MBytes in size, exactly the same size of one ROM Bank,
> which is hard-wired at 0xff800000~0xffffffff.
Just needs the ROMs mapped there. My 603 MMU emulation is far more accurate than the previous core, and they do configure the MMU this way in daytona2. With that mapped, the self-test validates all ROMs except those that are patched.
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Re: Address mapping error in Model-3 PowerPC CPU board emulation?
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Address mapping in Model-3 PowerPC CPU board emulation?
