> Is there anyone working on Dynarec for some DSP ICs? For example, TMS320C25/C51?
>
> These DSPs work on high clock and are highly pipe-lined, so Dynarec is much more
> useful for them.
The "highly pipelined" part is exactly why there's no DRC. Handling delay slots in a DRC is 100% pure murder, and at least the TGPx4 has a whopping 4 instructions it executes in the delay slot (I'm guessing other DSPs are similar but I'm not familiar with the subject). I thought SH-2 and MIPS were bad with 1 
Also, Olivier Galibert's been working through bugs in the 320c25 interpreter so we generally don't like to start a DRC when the interpreter isn't reasonably solid. And Namco System 22, currently the heaviest user of the 32c025, is rasterization bound not DSP emulation bound so there's no real case.
That all said, it's not *that* difficult to write a UML DRC in MAME's framework. I did the SH-2 with the somewhat minimal documentation on the wiki and the occasional panicked late-night email to Aaron and I think it turned out well.
Edited by R. Belmont (07/05/09 04:50 AM)
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