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z180 and dma question
#148184 - 04/04/08 09:59 AM
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Hi,
I'm looking at adding support for a board which uses the z180. A device on the board asserts the dreq0 line on the z180 for dma data transfer. From looking at the z180 emu code I don't see how I can control the state of this line. I was expecting something similar to how interrupt/nmi line is controlled but don't see it.
Can anyone help ? I'm probably missing the obvious.
Thanks
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Re: z180 and dma question
[Re: bfg]
#148244 - 04/05/08 01:29 AM
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> Hi, > > I'm looking at adding support for a board which uses the z180. > A device on the board asserts the dreq0 line on the z180 for dma data transfer. > From looking at the z180 emu code I don't see how I can control the state of this > line. I was expecting something similar to how interrupt/nmi line is controlled but > don't see it. > > Can anyone help ? I'm probably missing the obvious. > > Thanks
For the Z180 core you have to use the cpunum_get_reg/cpunum_set_reg functions to access the I/O lines. They're mapped as individual bits in a 32-bit psuedo-register. Bit of a strange design. Try the following:
Code:
{ UINT32 iostate;
/* Save current IO lines state */ iostate = cpunum_get_reg(0, Z180_IOLINES);
//According to z180.c: //#define Z180_CKA0 0x00000001 /* I/O asynchronous clock 0 (active high) or DREQ0 (mux)*/
iostate &= ~1; iostate |= dreq0_state ? 1 : 0;
cpunum_set_reg(0, Z180_IOLINES, iostate);
}
Edited by Phil Bennett (04/05/08 01:51 PM)
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